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How to append to an existing logfile without overwriting it for multiple Xilinx Vivado xvhdl and QuestaSim vcom compile commands

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[QUOTE="dick_freebird, post: 1790961, member: 159097"] If it's an inlined output file direct like >./myLogFile Then >> appends instead of replaces. If it's baked into the run files (?) then you'd fix it where you find it declared. [/QUOTE]

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Digital Design and Embedded Programming
PLD, SPLD, GAL, CPLD, FPGA Design
How to append to an existing logfile without overwriting it for multiple Xilinx Vivado xvhdl and QuestaSim vcom compile commands

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