How to achieve -80dB PSRR in p input 2 stage opamp ?

[cinch]

How to achieve -80dB PSRR in p input 2 stage opamp ? I am getting PSRR of just -30dB .

 

[scottieman]

Re: High PSRR cmos opamp

How to achieve -80dB PSRR in p input 2 stage opamp ? I am getting PSRR of just -30dB .

Would you mind posting your circuit schematic here?
It does help us to analysis it

Scottie

 

[sunking]

High PSRR cmos opamp

you can use cascode for high pssr op

 

[Humungus]

Re: High PSRR cmos opamp

For sure some of your transistors is in its linear region.

 

[tlihu]

Re: High PSRR cmos opamp

For sure some of your transistors is in its linear region.

Linear or saturation region, talking about CMOS op-amp?

 

[cinch]

Re: High PSRR cmos opamp

i checked again. all transistors are in saturation. yeah! its cmos opamp. its 2 stage cmos opamp with miller cap and nulling resistor. its the same standard ckt given in hollberg, but a small difference is its p input. this 2 stage is followed by a source follower to drive resistive load. i am not able to post the schematic, thats y i am giving description.

 

[scottieman]

Re: High PSRR cmos opamp

i checked again. all transistors are in saturation. yeah! its cmos opamp. its 2 stage cmos opamp with miller cap and nulling resistor. its the same standard ckt given in hollberg, but a small difference is its p input. this 2 stage is followed by a source follower to drive resistive load. i am not able to post the schematic, thats y i am giving description.

if you want to get a good PSRR, you need to match all transistors in your op-amp according to their branch current. In case you already did it, the problem may due to strong channel-length modulation, in other word, small output resistance from transistor. You may consider to increase the channel length of your MOS transistors.

Can you tell me what CMOS technology you are using (e.g. 0.6um or 0.35um??), and what is the MOS transistor channel length now.

Scottie

 

[sunking]

High PSRR cmos opamp

increase the channel length

 

[cinch]

Re: High PSRR cmos opamp

i am using 0.35 um technology.
input transistor lengths r 5.3e-6 m. current mirror and tail transistor lengths r 2um. second stage input transistor is 8e-6m. rest all transistors 2um. current designed is 15um.

Added after 1 minutes:

i mean current is 15uA.

Added after 1 hours 5 minutes:

yeah! i got 80dB PSRR when i increased the lengths of current mirror and tail transistor... Thanks a lot

 

[cliffj]

Re: High PSRR cmos opamp

Try cascode structure, and increase the channel length. Also check the
compensation method you're using. A buffer (common gate) might be
inserted to interupt the supply ==> output path etc ....