[SOLVED] how should i use baud_clk as a enable signal in uart contriller module...

Status
Not open for further replies.

sagar.bavane

Junior Member level 1
Joined
Aug 7, 2013
Messages
17
Helped
3
Reputation
6
Reaction score
3
Trophy points
3
Location
BANGALORE
Visit site
Activity points
97
Actually, according to the codeing standerds whole module should contain singal clock.....
so in implementation of uart controller in fpga i generated baud clk but i cant use it as a clock i want to use it as control or enable signal plz give me suggesions.....
 

If the baud clock is implemented with an approximate 50% duty cycle you'll also need to perform an edge detect in your single clock domain if you want to use it as an enable, otherwise you'll have a burst of enables during the baud clock high phase.

Regards
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…