Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
you need to modify the parameter in tiny technology file to make sure it fits
the real sitiuation. You can have an experiment to simualte the inductor pattern
provided by froundy such as tsmc. Check the Fsr, Q and inductance, it should
be quite satisfied, especially in inductance value. But, somehow you may need to modify the parameter to get more accurate result.
ususally you use asitic as a first order estimate of your inductor design.
however with complicated substrates and package designs and with an increasing amount of inductors on chip you must do electromagnetic simulation with HFSS, Momentum or something similar.
use asitic for sizing and a first pass at the design.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
