henrywent
Member level 5
how much should i set the width of a finger in proper layout design? The process is 0.18um cmos, W/L=24u/0.2u, should i split it into 3 fingers with 8u/0.2, or 6 fingers with 4u/0.2, which scheme is better in terms of parasitic capacitance reduction and good matching? In general, how much should we set the width of the finger?
thanks!!
thanks!!