how minimize output voltgae spikes in sepic dc dc converter

it looks like you have it in ccm. which is good, but was that at min vin, max load?...and really I meant to see it on a ms time scale, so we can see if the low frequency resonant ring we spoke of is happening.

i to reduce resonance problem, i changed my capacitor c1 value to 47uF still i have the same problem, the gate voltage is oscillating at gate thresold voltage level

are you driving your fet hard off and hard on?.....it should be driven on via a low impedance source, and when off should be shorted the gate to ground with a low impedance. Take control of that gate.

i am driving mosfet through 'ncp5181',gate resistance 10ohm, gate voltage 12 volts.
i am getting low frequency resonant spikes in output, as well as very high current spikes in switch.
here is the spikes which i got in outvoltage for every about 10ms

Sorry Maloth, I don't know what is the above waveform, where?.
Here is your sepic converter now in the free LTspice. Please tell me what problems if at all that you see with it? Sorry I do not like Simetrix as it costs dear.

to run simulation in LTspice, simply download free ltspice from linear.com, then you convert the .txt file here to .asc -then you open the .asc file in ltspice, and hit the running man icon, and it run for you.

I just updated the simulation so it does 1500w output power at 50vout.

- - - Updated - - -

Woops..just had to adjust the sim, please ignore the previous one.

- - - Updated - - -

ok I see now from your waveform you say spike is in vout. I see frequency is very high, this looks like scope probe noise to me.

- - - Updated - - -

Also, Maloth, you need , as you know, to find the sepic capacitor, which for your worst cases of vin and Pout, needs to be 90uF, 300v rated and rated for 27 Amps of ripple current. Does anyone know where to get such capacitors?.
The sepic cap sees the input voltage, but at start up the inrush can make its voltage go higher. Maybe you can reduce the voltage rating of this cap by having a soft start, or inrush limitation....you can get it to say a 200v rated cap then.

If you cant find a sepic cap rated for 27 amps of ripple, and 300v rated, then use instead a full bridge smps I would say....or a phase shift full bridge smps.

- - - Updated - - -

Now also here is the coupled sepic version of Maloth's sepic converter.

i am getting low frequency resonant spikes in output, as well as very high current spikes in switch.
here is the spikes which i got in outvoltage for every about 10ms

Click to expand...

The current spikes have been previously identified as diode reverse recovery effect, I'm rather sure that the explanation is correct. It's a matter of rectifier and switching transistor speed and optimal gate waveform. Reverse recovery current peaks have to be accepted to a certain extent and your circuit layout must be prepared for it.

10 ms period of an interference refers to a mains fullwave rectifier, apparently the source is outside the presently discussed circuit. I agree with treez that you are possibly picking up noise by an unsuitable probe connection.

also, you can reduce the ripple in that sepic cap by increasing the sepic inductors henry value, though with the uncoupled version, be wary about the L-L-C resonant frequency and the feedback loop bandwidth, as they can interact and cause instability.
The coupled version of sepic frees you from this problem, as the resonance is between c(sepic) and the leakage inductance, so its usually well above your feedback loop bandwidth, and so you get no interaction and stay stable.
I am not sure if you have real circuit or just sim?
Also, I don't understand why you are using NCP5181, as that is a bootstrap gate driver, not needed for you , since the great advantage of sepic is that you only need low side fet drive.

The way you have done your turn off snubber will also contribute to over volt spikes on the mosfet, I note you are only simulating, in the real world you need minimum loops for the current to commute to at turn off, meaning small components and low ESR/ESL, then you need to add snubbers (RC only reccommended), if you insist in using a slow o/p diode you will need a snubber on this also, sepics are renowned for o/p voltage ripple, a second LC filter is useful in reducing this effect...