Yes, you're on the right track.
To test timing, you need to know what it's SUPPOSED to be. Do you have some READ or WRITE signal associated with the bus? How about a clock? You need to verify that the data setup and hold times are met, within some margin.
What is your expected load? Put that load on the bus and verify that the voltages are still within spec. (This is probably not a real high-priority test, unless the bus is going off the board).
Is this bus going off-board, or just from one chip to another? HOW your bus is used will determine what really needs to be tested.