How long for PFC chip to come out of disable?

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The data sheet indicates that the 'restart current' after disable is the same as that during normal start up conditions.





I would assume that whilst held 'off' the IC will draw similar currents and whilst the circuit is no longer getting VCC supply from the boost inductor there will still be maintenance from the 'bootstrap'..



R4 and R5.

If you can ensure that VCC does not drop below the UVLO turn off threshold, VCCoff, and that requirement would probably be imposed by design then I would expect the circuit to be operational immediately.

That does not mean that your output voltage(s) will be within specification at the same time. The circuit still needs to come back into regulation.

Genome.
 
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