How is ECO related to VLSI?

[carrot]

Hi,

Can anyone please elaborate on ECO(Engineering Change Order). How is it related to VLSI.

 

[Shurik]

Re: ECO

Hi !!!
Example:
You have schematic or Verilog Netlist and them topology .
You are doing changes of schematic or Verilog Netlist.

How doing change of topology:
1. You can do a new topology
2. You can use is ECO, where you do minimum changes of topology

I used it in SiliconEnsamble

 

[Thinkie]

ECO

If you want to do an ECO from HDL you can use something the (now discontinued) Synopsys ECO Compiler...

My experience is that it worked.... but it was too expensive... I don't know why they discontinued it

 

[neo_chip]

ECO

Consider after P&R, you need to change the code for a particular block and the rest of the blocks are not touched.
So when you do ECO, routing for the particular block is done while other routing are untouched. Thereby saving time.
ECO is usually done when there is only 10 - 15% change in the metal routing. If it is greater it is better to do the full routing.

 

[jjww110]

ECO

you can place spare cell for mental change

 

[yln2k2]

Re: ECO

Hi ,

In VLSI Industry you will hear this term in many phases of VLSI flow .

1) ECO for functional changes
2) ECO for setup fixing
3) ECO for Hold fixing
4) ECO Metal fixing

1) If you see last minute bugs in RTL which need to be rolled in netlist they do ECO ( where they don't have enough time to do re synthesis ) .

Same is applicable to post layout data base and metal fixing ( if you find some issues in isolation cells or combinatinal logic insurtion which can be done by a spare cell ) ...

2) If you see some corelation issues between PT & Back end tools we do ECO by upsizing or downsizing cells/buffer ( if violations are with in limit ) ...


Thanks & Regards
yln

 

[r63511]

ECO

Good answer ! Thank you !
Can you explain in a bit more detail on why metal fixing?

 

[designer_ec]

Re: ECO

Hi,
Thanks all for explanation of ECO,but I have doubt at what stage we have to go for ECO in bankend flow,I mean any time we can do the ECO in the flow.Suppose for example I got setup violation before CTS,can I do the ECO at that stage?

 

[tukken]

ECO

No, You need to evaluate your situation and current stage, If there are many violation in your after CTS netlist, it's need tools to fix the violaiton.

 

[sree205]

Re: ECO

Here is a paper by steve golson on ECO. should be helpful.

 

[designer_ec]

Re: ECO

Thank you sree,you provide good meterial on ECO.
Hi tukken actually I ask that before CTS we can do ECO,but you tell that after CTS.