avantika10
Newbie level 4
Hi,
can somebody tell me how addressing is done in DDR memory?
lets say, if i have 14 bits row address and 10 bits column address, and a 4 bank chip, does it mean i have
( 2 ^ 14 ) * (2^10) * 4 number of addressing locations?
Also, if my data bus width (dq) is 16 bits wide, does each address location stores 16 bits of data?
can somebody tell me how addressing is done in DDR memory?
lets say, if i have 14 bits row address and 10 bits column address, and a 4 bank chip, does it mean i have
( 2 ^ 14 ) * (2^10) * 4 number of addressing locations?
Also, if my data bus width (dq) is 16 bits wide, does each address location stores 16 bits of data?