Just to clarify, you can use a for loop like shaiko suggests to reverse the value in the A(31 downto 0) vector, but you can't reverse the vector to A(0 to 31). The vector would have to be declared as A(0 to 31).
signal a : unsigned ( 31 downto 0 ) ;
signal b : unsigned ( 0 to 31 ) ;
signal x : unsigned ( 31 downto 0 ) ;
signal y : unsigned ( 0 to 31 ) ;
x <= a + b ;
y <= a + b ;
1. Will the numeric value of x and y be the same?
2. Will bit a(0) be added to bit b(0) ?
The Numeric_std functions treat all numbers as (n downto m) without reversing the range. So in the case of a (0 to N) number, 0 will be treated as the MSB.
Hi Shaiko,
May I have a question?
if you use "for" loop like in your code and then implement its in FPGA, what will happen?
what difference when I use the follow code in stead of yours?
if you use "for" loop like in your code and then implement its in FPGA, what will happen?
what difference when I use the follow code in stead of yours?
No difference.
VHDL
You should always keep in mind the red part.
You describe hardware - nothing more. Same as drawing a schematic circuit - but in code.
The richer the language - the more ways there're to tell the same story.