How does this circuit work?

[tstein]

how does a fet driver work

My questions are in reference to this:

**broken link removed**
**broken link removed**

Background: This circuit is a piece of a larger one for a coil driver. I have simplified the drawing for the purpose of these questions. V1 is a battery (12 volts) and V2 is a FET driver of which the output will be 0v or +5v. V2 is pulsed, so that when Q1 is on, Q2 is off and the other way around.

1) I'm a bit confused as to the purpose of C5 is and how it would work in circuit. Seems to me that C5's cathode will always be 12 volts and when Q1 is on, the anode would also be 12 volts. What am I missing here?

2) How exactly does R6 and D3 function in this circuit? Some sort of gate voltage protection?

3) What is the purpose of D1 and D2?

Thanks for the help!
Tomas

 

[artem]

I think the scheme is a bit erroneous? and incomplete .

Suppose the coil should be driven symmetrically - that means Q1's source must be connected to +24 V DC, and place of connection between C6 and C5 to +12VDC

Assuming complementary mosfets are driven from same source - scheme author supplying swithcing pulses by capasitor to decouple DC part . R6 is used for decoupling of switching pulses on DC and to ensure that Q1 is closed when no pulses are supplied .

D3 is used to limit Q1's Vgs voltage and protect it .

R6 C7 T is aboout 1 millsec , that means freq will be above 1 KHz for sure .

Additionally i think R4 must be tied to D1 D2 connection place and V2 is the source of pulses to coil.

Is this lab work ?))

 

[tstein]

I think the scheme is a bit erroneous? and incomplete .

Nope, it's deffinatly complete as it's being used. Just double checked it.

Suppose the coil should be driven symmetrically - that means Q1's source must be connected to +24 V DC, and place of connection between C6 and C5 to +12VDC

Deffinatly no +24VDC in the system. Is as is.

Assuming complementary mosfets are driven from same source - scheme author supplying swithcing pulses by capasitor to decouple DC part . R6 is used for decoupling of switching pulses on DC and to ensure that Q1 is closed when no pulses are supplied .

the source that provides the pulses is software controlled and uses a non-inverting FET driver. V2 isn't actually a voltage...it represents the pulse train.

D3 is used to limit Q1's Vgs voltage and protect it .

R6 C7 T is aboout 1 millsec , that means freq will be above 1 KHz for sure .

Ok, i follow you here. Indeed the pulse frequency is above 1KHz.

Additionally i think R4 must be tied to D1 D2 connection place and V2 is the source of pulses to coil.

Correct, R4 is tied to D1, D2, and V2 (the source of pulses).

Is this lab work ?))

Unfortunatly not I'm a mechanical engineer and our electrical engineers are out of town. I'm needing to get a handle on this coil driver to address a production problem.

I'm still a bit confused about C5. Seems like it's never really going to charge. Maybe I'm not understanding it correctly?

Also, specifically, what is the function of the two diodes (D1 and D2)?

Thanks,
Tomas

 

[artem]

OK i dont know nature of control pulses on Q1 and Q2
but fr C5 i can suppose following When positive pulse comes to Q2 - it opens and connects L1 toground , thus lead to energy accumulated in L1 . Then when Q2's gate goes to 0V - Q1 is opens due to C7 (it takes a time to charge this cap) and also energy accumulated in L1 lead to voltage changed in polarity . Assuming that Q2 will be opened the energy from L1 will charge capasitor C5 to positive voltage , thus eliminating needs for +24 V in system . Hope this is correct . If you find a scope or multimetr you can check that .

regards

Added after 1 hours 6 minutes:

D1 and D2 may be used to prevent Q2 gate from spikes coming from C7. But it should not be case if control pulses are given from low impendance driver.

 

[tstein]

artem,

That makes sense to me, however, when might C5 discharge?

Thanks,
Bruce

 

[artem]

Discharge of C5 will be when Q2 is opened , i think it will return of energy from L1 to L1 itself via capasitor .
May be it is to prevent L1 ferrite core from saturation ?

BTW , what is coil used for ?

Added after 2 minutes:

I meant that firstly the capasitor is charged, and when L1 energy goes off - capasitor will give energy back to coil.