How does this always block work ?

[ukapil]

How does this work ?

**************
always@(($time-time_cs_start)>`tCEM) begin
$display("max tCEM violation", $time);
$display("time_cs_start = %t",time_cs_start);
end
**************

`tCEM = 4000ns

It is observed that when $time = 5 ns & time_cs_start = 5 ns, it enters into the always block.

Please explain me the working of the always block.

thnx,
ukapil

 

[nand_gates]

Re: How does this work ?

Please while posting such questions be more specific!
What I mean is...
On which simulator you got this problem?
What was simulator version??
What is type for " time_cs_st " variable??
What is `timescale ???

Added after 14 minutes:

First "time_cs_start" should be declaired as of type time.
always block is evaluated evry time there is event on signals in
sensitivity list. Here in ur sensitivity list $time is a function and
`tCEM is a constant the only signal you have is time_cs_start
So whenever it changes (event on signal) always block in ur code
should execute. I doubght time_cs_start is changing at 5 ns to 5ns.

 

[omid219]

How does this work ?

R u using NCVerilog simulator?

 

[ukapil]

Re: How does this work ?

I am using Modelsim.

 

[nand_gates]

Re: How does this work ?

I used both ncverilog and modelsim with ur code!

 

[ukapil]

Re: How does this work ?

Thats ok but why does it enter the always block when $time = 5 ns & time_cs_start = 5 ns ?