Dear branred.
Very interesting question! In my point of view, there are similarities between these two phenomenon. The results of them are “similar” - higher current - but their causes seem to be different for me.
(a) Channel modulation: when the VDS voltage is so high that there isn’t the required voltage between the gate and channel (VG – VD) to cause the channel inversion. Therefore, there is the pinch-off and the channel length decreases with higher VDS.
(b) DIBL in small channel devices: the increase of the depletion region from the drain decreases the barrier for electron electron injection from source to drain. If drain voltage is too high, the depletion region of drain can reach the source (punch through).
I think that the effects caused by (b) are reduced in long channel devices, because the big values of transistor length. In this case, the drain and source regions are too distance each other in such way that the increase in the channel charges caused by increase in VDS is small compared with VGS. In other words, the depletion in the channel region is much more caused by gate voltage than drain voltage.
Phenomenon (a) is modeled by lambda
Phenomeon (b) is modeled by reduction of the threshold voltage.
This is my point of view. I´m not sure too.