MaZiDium
Newbie level 1
- Joined
- Apr 7, 2014
- Messages
- 1
- Helped
- 0
- Reputation
- 0
- Reaction score
- 0
- Trophy points
- 1
- Activity points
- 9
Hi
couple of months ago I tried to receive ASI using Xilinx cores in Spartan-6. I wasn't successful and then I got busy and now I have time again to work on that.
This is my first post here and I want to know how you receive ASI data using an FPGA? Do you use other ICs like Cypress CY7B923 or you receive the data using vhdl cores?
What if I want to receive multiple ASIs then the area and power for the external ICs become a problem and if not I think the cores take a lot of logic inside FPGA.
Thanks for considering my post.
Regards
Maz
couple of months ago I tried to receive ASI using Xilinx cores in Spartan-6. I wasn't successful and then I got busy and now I have time again to work on that.
This is my first post here and I want to know how you receive ASI data using an FPGA? Do you use other ICs like Cypress CY7B923 or you receive the data using vhdl cores?
What if I want to receive multiple ASIs then the area and power for the external ICs become a problem and if not I think the cores take a lot of logic inside FPGA.
Thanks for considering my post.
Regards
Maz