Re: Ramping Vdd
Hi.
You may use "pwl" (piece-wise linear) source (or vpwl instance in some simulators, i.e. pwl voltage source) to create any arbitrary signal. However in your case you can just use a "pulse" voltage source (vpulse instance in some simulators). For example in HSPICE:
.param vd=1.8
vdd vdd 0 pulse(0 vd 0 100n 100n 4u 10u )
In the above lines we have defined a pulse-shaped supply voltage between nodes "vdd" and "0" (default ground in HSPICE) which has a transition from 0 to 1.8V. It has an arbitrary 100ns rise and fall time and it remains 4us High and has a period of 10us.
The pulse voltage source syntax in general:
vxxxx positive-node negative-node pulse(voltage1 voltage2 delay rise-time fall-time voltage2-width(in seconds) period(in seconds))
Now you can use this pulse source and set its rise time larger to let the circuit sense it.
Regards,
EZT