aryajur
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Bias voltage generation
I need to bias the bulk terminals of PMOS devices to a value lower than Vdd of the circuit. But if I use a resistor divider, the divider branch takes up a lot of current. If I increase the resistance values, they will take up a lot of area !
How do I get a bias voltage?
I need to bias the bulk terminals of PMOS devices to a value lower than Vdd of the circuit. But if I use a resistor divider, the divider branch takes up a lot of current. If I increase the resistance values, they will take up a lot of area !
How do I get a bias voltage?