How do I assign decimal values in verilog?

[mahesh_namboodiri]

I have a LUT in I need to assign values. They are in the range of 0 to 3.3. Following is the code:

case(address)

8'b00000000: new <= 16'bXX00111111111111;

8'b00000001: new <= 16'bXX00011111111111;

8'b00000010: new <= 16'bXX00000000010000;

8'b00000011: new <= 16'bXX00000000000000;

8'b00000100: new <= 16'bXX00111111111111;

8'b00000101: new <= 16'bXX00111111111111;

8'b00000110: new <= 16'bXX00000000010000;

8'b00000111: new <= 16'bXX00000000010000;

default: new <= 16'b0; // Default case if address is not matched

endcase

Now according to what i need, the last 12 bits should be the values that I want to enter into the variable, which are 0.4125, 0.825 etc all upto 3.3. I am supposed to access this module from another top level module. How do I convert these values into Floating/Fixed point representation? I am at a loss. I cannot find any reliable converters on google.

 

[kaz1]

What I do is scale up to rounded integer using a suitable scale factor. Then descale when applied.
for example 3.3 can scale to round(0.4125 * 2^10) = 422 then when applying it to target computation discard 10 LSBs. so 422/2^10 = 0.4121 is back in effect doing what was intended.
If more resolution is needed use higher scale factor but keep it 2^n

 

[KlausST]

Hi,

It depends on data format and range and resolution.

So 0 to 3.3 could have a resolution (step size) of 0.1. Thus resulting in an integer value of 0 to 33.


Klaus