hi all:
how can the Kvco effects the performance of pll? can the Kvco be very large like 2Ghz/v?
if i want to design a vco with frequency range from 250M to 1.7Ghz and the supply voltage is only 1.8v, the Kvco is inevitably large.
then how can i do ?
thx
hi all:
how can the Kvco effects the performance of pll? can the Kvco be very large like 2Ghz/v?
if i want to design a vco with frequency range from 250M to 1.7Ghz and the supply voltage is only 1.8v, the Kvco is inevitably large.
then how can i do ?
thx
hard to realize it?
i want to make a pll as a clock frequency multiplier for HDMI1.3
the data clock is 25M to 340Mhz, and the pll is used to 5 times the clock frequency
hi all:
how can the Kvco effects the performance of pll? can the Kvco be very large like 2Ghz/v?
if i want to design a vco with frequency range from 250M to 1.7Ghz and the supply voltage is only 1.8v, the Kvco is inevitably large.
then how can i do ?
thx
almost everything is possible... but not always what you want!
Very large Kvco will be bad for phase noise and stability of the loop.
Assuming you have a LC tank you should use banks of switchable capacitors like most people do... And leave only a fraction of the total capacitance variation to a varactor.
Search for wideband VCOs in google, you'll find several papers and thesis on it.
almost everything is possible... but not always what you want!
Very large Kvco will be bad for phase noise and stability of the loop.
Assuming you have a LC tank you should use banks of switchable capacitors like most people do... And leave only a fraction of the total capacitance variation to a varactor.
Search for wideband VCOs in google, you'll find several papers and thesis on it
i have seen Ic's from big companies , when the PLL will be used in very wideband , they make a bank of vco's and everyone cover some part and they do a some logic to select which VCO will be used , so they will not affect the stability or phase noise , they pay a chip area
Kvco is dependent on the requirement and the max achieveable range of variosions in the capacitance you can achieve with the applied voltage . again the linearity play a major roll as the cap variation is not linear also the variation of L is not possible . so take the factors in consideration .
hi all:
how can the Kvco effects the performance of pll? can the Kvco be very large like 2Ghz/v?
if i want to design a vco with frequency range from 250M to 1.7Ghz and the supply voltage is only 1.8v, the Kvco is inevitably large.
then how can i do ?
thx