Digital Design and Embedded Programming
PLD, SPLD, GAL, CPLD, FPGA Design
How Can I Implement a Tristate Buffer with Transistors?

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Every TTL circuit has a standard input threshold voltage of 2 diode drops or 2*Vbe
This compares 74' 74LS' and 74S' inputs and outputs for tri-state buffers
The '244 types are non-inverting and '245 were inverting hex TS buffers... any questions?

[ATTACH=full]197873[/ATTACH]

[QUOTE="D.A.(Tony)Stewart, post: 1789786, member: 134022"] Every TTL circuit has a standard input threshold voltage of 2 diode drops or 2*Vbe This compares 74' 74LS' and 74S' inputs and outputs for tri-state buffers The '244 types are non-inverting and '245 were inverting hex TS buffers... any questions? [ATTACH type="full"]197873[/ATTACH] [/QUOTE]

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How Can I Implement a Tristate Buffer with Transistors?

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