How can I do the DAC's DNL&INL simulation?

[Analog_starter]

Dear All,

I am designing an 8-bit current-steering DAC, and want to do a simulation
to get the DNL and INL. How can I do that? Use hspice or Matlab???

Thanks.

Analog_starter

 

[wany]

you can use candence. it has a ideal symbol to test DNL and INL

 

[watersky]

you can use 8 vpulse-sources,period of which is stepwise increasing. every vpulse-source begins low-level.By them you can gain 0000_0000 to 1111_1111.you can gain output of stepwise voltage. you can get DNL and INL.

 

[yen]

How to use cadence to measure DNL and INL?
thank you

 

[Analog_starter]

My question is how can I get the DNL & INL　ｖａｌｕｅ　ｗｈｅｎ　Ｉ　have got output of stepwise voltage?? How can I measure the value??

Thanks
Analog_starter

 

[Lantis]

You can calculate the best fit line equation according your output. From the best fit line you can find the Vlsb and offset.
INL and DNL can be calculated.
I hope it usefully .

 

[Analog_starter]

Thanks, Lantis.
But how can I catch the every stepwise steady value from Hspice simulation results to calculate the best fit line ??

Thanks.
Analog_starter

 

[yibinhsieh]

You can use the command of "measure" to get the data in the stable region.

But you need to write 255 commands by hand. Or you can use Perl to generate these command and then copy to the your spice file.

Yibin.

 

[chenliy]

You can add a 8bits ADC in front of DAC. The output of ADC is connected with the input of DAC. The input of ADC is a ramp signal. So you can measure INL and DNL.

 

[Analog_starter]

Thank you all.

Hi chenliy,

Is there any way to add an ideal 8 bits ADC in front of my DAC and simulation
them by hspice ??

Thanks
Analog_starter

 

[paladinzlp]

Dear Analog_starter:
I have the same problem. I think that chenliy's
method is a good method and the ideal
comparator(8) can as the ideal ADC.
I hope that helps.

 

[watersky]

if an adc is added,you need to think about linearity of adc. So how many bits should be used. My prevenient means can get actual voltage. You can use an ideal 8bits dac,and you can get theoretic voltage. compare them and you can get DNL and INL.

 

[chenliy]

You can use verilog-A for ideal ADC.

 

[watersky]

but this ideal adc is 8bits or 10bits? do you remember what is said in allen's book.

 

[analog_design]

Dear watersky and paladinzlp:
If I add the 10-bit ADC before the 8-bit DAC,
How to simulate the DNL and INL?
Expect verilog-A,how can I add the 10-bit
ADC?

 

[Analog_starter]

Thank you all,

But if add a 10bit ADC before the 8bit DAC, which codes should feed into the DAC? the 8 LSB outputs of the ADC or MSB?

Thanks,
Analog_starter

 

[tlihu]

Thank you all,

But if add a 10bit ADC before the 8bit DAC, which codes should feed into the DAC? the 8 LSB outputs of the ADC or MSB?

Thanks,
Analog_starter

Of course it's the 8 MSBs, drop the 2 LSBs.