Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How can I define a spyglass rule?

luoyanghero

Junior Member level 3
Junior Member level 3
Joined
Nov 22, 2016
Messages
30
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Location
ShengXiaLu
Visit site
Activity points
2,498
For example the follow code, according condition_a, check whether have condition_b.
Is there a rule about this, if not, how can I create it?
always@(posedge clk or negedge condition_a) begin
if(condition_a)begin
data[1:0] <= #`DLY 0;
end
else if(condition_b)begin
data <= #`DLY 1;
end
else begin
data <= #`DLY 2;
end
end
 

LaTeX Commands Quick-Menu:

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top