How can I create a new part/model in Pspice library?

Similar threads

• A

  How can I run verilog code with data at a specific time in the past?

  • Started by alexis57
  • Jan 28, 2024
  • Replies: 2

  PLD, SPLD, GAL, CPLD, FPGA Design
• G

  can we design FPGA?

  • Started by gary36
  • Oct 29, 2024
  • Replies: 18

  PLD, SPLD, GAL, CPLD, FPGA Design
• M

  How do I assign decimal values in verilog?

  • Started by mahesh_namboodiri
  • Jan 31, 2024
  • Replies: 2

  PLD, SPLD, GAL, CPLD, FPGA Design
• H

  How to store Coco training data set in Pynqz2 board

  • Started by hudda
  • May 25, 2024
  • Replies: 1

  PLD, SPLD, GAL, CPLD, FPGA Design
• K

  Simulation does not start in Modelsim when using Xilinx IP-cores.

  • Started by Kevsh
  • Jul 11, 2024
  • Replies: 4

  PLD, SPLD, GAL, CPLD, FPGA Design