i have finish a ADC layout,and i want to add a test pad in the layout,i dont know is it necessary add a buffer between the test point and the pad?
and if need,how ?
i have add four inverter between the test point and pad,now i am doing postsimulate,it is so slow.
can anyone tell me how to postsimulate using nanosim?
Hi, tuza2000,
Nanosim is a high-precision transistor level simulation tool, so it is slow. Why not try Hspice?
If test pad needs to drive large capacitor or low value resistor load, buffer is needed.
Bg,
tuza2000 said:
i have add four inverter between the test point and pad,now i am doing postsimulate,it is so slow.
can anyone tell me how to postsimulate using nanosim?