Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How can flicker noise corner be specified in simulation tools(spectre)?

Status
Not open for further replies.

Jason_kang

Newbie
Newbie level 3
Joined
Aug 9, 2019
Messages
3
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
39
Hi,

I am currently designing LC VCO with CMOS process. The frequency of interest is K/Ka band.

In some of published papers, we can see that the flicker corner frequency is specified.

1592969848196.png

(source : Y. Hu, T. Siriburanon and R. B. Staszewski, "Intuitive Understanding of Flicker Noise Reduction via Narrowing of Conduction Angle in Voltage-Biased Oscillators," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 12, pp. 1962-1966, Dec. 2019, doi: 10.1109/TCSII.2019.2896483. )

The question is, how can I specify the flicker corner frequency in simulation tool(ex. spectre Pnoise)?

If there is no proper way, I should calculate and get the dBc change per octave(dBc/octave), which is considered a very inefficient way.

Thanks.
 

The authors of the posted paper are persistent with the idea that placing the oscillator active devices in Class C or even in Class D and F, the flicker noise of the oscillator will be improved by few dB's.
See papers: "An Ultra-Low Phase Noise Class-F2 CMOS Oscillator With 191 dBc/Hz FoM and Long-Term Reliability" and "A 1/f Noise Upconversion Reduction Technique for Voltage-Biased RF CMOS Oscillators".

First of all, experience teach me that never place the active device of an oscillator in other class than A or B, and avoid saturation of the active devices at all cost, because this will lower the loaded-Q of the resonator, since the device losses will then add to those of the resonator.
However, a reach in harmonics oscillator (as other classes than A and B has) will have a great influence in any type of phase noise measurements.

Flicker noise is dependent on the DC current through the active device.
The best option to minimize flicker noise is to use a high current device (big structure device, with high parasitic capacitance) biased at low current (usually 10x less then nominal).
Another option to reduce the flicker noise can be done through RF feedback. See U. Rohde papers and books about this topic.
 
dear vfone, I'm thank for your post.

I have some questions for you.

experience teach me that never place the active device of an oscillator in other class than A or B, and avoid saturation of the active devices at all cost, because this will lower the loaded-Q of the resonator, since the device losses will then add to those of the resonator.

Q1) I didn't quite understand the meaning of 'all cost'. The meaning of your answer is understood to be that Class A or B operation always makes the active element present in the saturation region, so that the device loss of the transistor drops resonator loaded-Q. Is this correct?

Since being always in the saturation region means high Rout, can it be said that the loss of the transistor is high?

However, a reach in harmonics oscillator (as other classes than A and B has) will have a great influence in any type of phase noise measurements.

Q2) I didn't quite understand the meaning of 'a reach'. Does your answer mean that the other class(C,D,F..) operation will affect the phase noise, mainly due to transistors' unnecessary harmonics produced by different operating areas (e.g., triodes)?

Q3) Thank you for suggesting a way to reduce flicker noise. However, it is not the answer to specifying flicker corner in simulation tools. Based on Leeson's PN estimate, I think, identifying the -30 dBc/decade point is one way. What do you think of this method?

best regards,

Jason Kang
 

Theoretically class-A can never reach saturation region, or at least have very low chances to get there.
In saturation, the active component will behave as a very low value resistor across the resonator, so the quality factor of the resonator drops, and the phase noise will go up.
Is no reason to simulate a very low phase noise oscillator, when the real life phase noise measurements are totally off due to high harmonics of the circuit.
I think Leeson equation cannot estimate 1/(f^3) and 1/(f^2) and assume that those two corners happen at 1/f, which for some cases is not true, but for some cases it is true (when phase noise very close to the carrier is not such important).
 
Dear vfone,

Thank you for your good reply. I misunderstood the class of amplifier.

I would like to confirm the meaning of the first answer. First, In general, conventional cross-coupled LC oscillator is known to perform class B operation. Also, class B has 180 degrees of conduction angle and is in the saturation region for half of cycle. Is that right?

So, In steady-state oscillation, I know that the impedance produced by the active device(-2/gm) must eliminate the tank loss(Rp).
Doesn't the behavior in the saturation make the negative resistance look big(i.e. quality factor of resonator increase)?

the active component will behave as a very low value resistor across the resonator, so the quality factor of the resonator drops

I confused your reply above.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top