How can comparator output have different frequency than clk

[cjupiter]

comparator output query

Im having a problem with the output of my comparator. I dont want the output to have the same frequency as clock. I want a constant output when output goes high. I have attached my schematic and current output. My transistor dimensions are

L(all transistors)=0.18u
Width:

W(m1,m4)=3.06u
W(m2,m3)=6.12u
W(m5,m6)=8.1u
W(m7,m10)=15.12u
W(m8,m9)=9u
W(m11,m13)=0.54u
W(m12,m14)=0.36u

my Vdd was going to be 1.8V but its at 1V at the moment coz for 1.8V i get very very small output

my inputs are two 50K 1V sine waves with a half period delay in between

my outputs occur at N1 and N2

Any help would be much appreciated

 

[kyrandia]

Re: comparator output query

I think a SR flip-flop can help you.


Regards

 

[santhoshv78]

Re: comparator output query

Yes..one SR flip-flop should be connected at the output to latch the data.

 

[cjupiter]

Re: comparator output query

thanks guys, only a few hours after i posted my query i came up with the same solution Comparator is working fine now...cheers for the input

-Con