How can a PLL reduce jitter?

[xvibe]

You can use a PLL to reduce jitter? How does it do that?
Any other ways to do jitter attenuator circuit?

 

[flatulent]

This works if the oscillator in the PLL has much less jitter than another source. You lock the PLL with a very narrow loop filter.

One example of this is in crystal oscillators. Highly stable crystal cuts have more phase noise than less stable cuts. So you set the frequency with the stable cut oscillator and then follow it by the PLL with the low phase noise crystal cut and use an extremely narrow loop bandwidth.

 

[rfmw]

One way to reduce the jitter in digital data is to use a D-type flip flop. Output jitter in this case is defined by jitter of the clock of the flip flop plus inherent jitter of the flip flop.

 

[layes2]

what kind of jitter you want to reduce
long term
period?

 

[xvibe]

I want to know in theorie how it works.
All kinds of jitter will be nice.

 

[funster]

because PLL is a band pass circuit,
if the PLL's frequency response is
designed very narrow, it will reject
outband noise, include jitter.

jitter is cause by many reasons, include power supply noise,
thermal noise, crosstalk, etc.
you should search the root reason and
take right measures.

best regards

You can use a PLL to reduce jitter? How does it do that?
Any other ways to do jitter attenuator circuit?

 

[sgperzoid]

I think one way works for the reduce of all the jitters is to improve the response of the loop filter