Horizontal line starting point after V-sync (VGA) ?

[hallo99]

Hello guys!

I try to program a VGA test pattern generator and i have seen that the whole thing is divided in horizontal lines. For example the v-sync is 3 lines long.

Now i do not know how to start the horizontal line after the v-sync-line is done - this should be after the frontporch of the (next ?) v-sync.

Does the h-sync-line start with its frontporch or directly with the h-sync-signal after a vertical sync ?

 

[KlausST]

Hi,

You need a document with a detailed description of the VGA signals timing.
--> show us what document you refer to.

You need to know what VGA parameters you want to use: reolution, pixel clock frequency, interlacing...
--> show us these informations.

What hardware do you use and how do you program it?

Klaus

 

[hallo99]

The signals are generated by an AVR and the resolution is 640x480@85Hz.

There are some 3 websites with roughly the same timings for this resolution - but they seem to have a difference of 30 pixel for the start of the visible line after the horizontal back porch. This could be a flexible parameter for adjustment of the picture center on the screen.

The websites are this: martin.hinner, tinyvga and johnloomis.


I intend to start with the v-sync but do not know what part of the h-sync comes after the v-sync-line is done. Logically thought it would be a backporch of the h-sync but i am not sure because the vga-specifications seem to be not officially available.

- - - Updated - - -



Excuse me i wrote it wrong. I am already a little bit further and i made a drawing of the problem. I need to know how the h-sync and the v-sync are aligned.

 

[KlausST]

Hi,

Is it really asking too much...for a document or a link?

The signals are generated by an AVR and the resolution is 640x480@85Hz.

If I calculated right, then the pixel clock is more than 26MHz...how can an AVR generate this?

Klaus

 

[hallo99]

http://martin.hinner.info/vga/timing.html
http://tinyvga.com/vga-timing/640x480@85Hz
**broken link removed**

This are the links i found regarding VGA signal timing.



I intend to halve the line resolution so that an AVR can generate the (doubled) pixel clock with an 18MHz clock source.

 

[FvM]

Regarding your original question.

In the VGA timing implementations that I see, the scan line starts with VSYNC. All vertical frame events are aligned with scan line start. In so far, your "version 2" is correct.

This interpretation corresponds to the meaning of the term "backporch", it's located at the end of a scan line. But I guess the difference doesn't actually matter for proper synchronization, "version 1" would work either.

 

[hallo99]

Thank you, i will try version 2 then.