Hi,
I'm designing an H bridge that should tolerate up to 3 VDD (9.9 V) using the standard process and stacked transistor. However, the supply voltage will change from 9.9 V to a lower voltage since a capacitor provides the voltage. Is there any topology that can have a large voltage window such as 9.9 V to 5 V? Thank you!
Here's a cross-coupled H-bridge. Self-oscillating. Capacitor is power source, supplies 10V initially. Oscillations continue as capacitor discharges to small voltage (in simulation). Timeframe is 4 seconds.