pumpkinxs
Newbie
Hi,
I'm designing an H bridge that should tolerate up to 3 VDD (9.9 V) using the standard process and stacked transistor. However, the supply voltage will change from 9.9 V to a lower voltage since a capacitor provides the voltage. Is there any topology that can have a large voltage window such as 9.9 V to 5 V? Thank you!
I'm designing an H bridge that should tolerate up to 3 VDD (9.9 V) using the standard process and stacked transistor. However, the supply voltage will change from 9.9 V to a lower voltage since a capacitor provides the voltage. Is there any topology that can have a large voltage window such as 9.9 V to 5 V? Thank you!
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