High Voltage Resistor divider

[a.singh123]

I am designing a DC High voltage power supply, using PSM technique. I need to control it in a feedback loop, for which i need a resistor divider at the final output. Output is a pulsed high voltage around 1000 Volts of frequency 20 kHz.
This high voltage pulse o/p needs to be attenuated down to 5 volts range using resistor voltage divider. I used a 5Mohm resistor with 20 kohm resistor in series, and then fed it to the OPAMP voltage follower ckt, but the output is very noisy. Please suggest how to get clean output. Actually my final objective is to low pass filter the pulse wave to get its DC value.

Regards,
Abhishek

 

[KlausST]

Hi,

What I don't understand:
You say it is a DC supply .... then you say it is pulsed output 20kHz .... then later you say you want to low pass filter it...
20kHz is far away from being DC.

Please explain.

About noise:
* show us your complete measurement schematic with all part values and exact part names.
* show us your PCB layout

Klaus

 

[FvM]

5 Mohm sounds reasonable if 200 mW power dissipation is acceptable. Without compensation, the resistor parallel capacitance involves a zero at several 100 kHz and respective enhancement of high frequency noise. No problem if the measurement bandwidth is limited to a low kHz range.

 

[a.singh123]

Hi,

What I don't understand:
You say it is a DC supply .... then you say it is pulsed output 20kHz .... then later you say you want to low pass filter it...
20kHz is far away from being DC.

Please explain.

About noise:
* show us your complete measurement schematic with all part values and exact part names.
* show us your PCB layout

Klaus

Dear Sir, I finally need to filter the high voltage pulsed output. Basically, I am designing a PSM (Pulse Step Modulation) high voltage power supply. The output of PSM "forward block system" is a high voltage pulsed output, and its input is a PWM (pulse width modulated input). To control the forward system in loop, we need to get the DC value of high voltage pulse, then based on the desired high voltage set point, we have to control the PWM input in loop.
The overall control algorithm is explained in the attached doc file, please refer to it.

Regards,
Abhishek

 

[betwixt]

I can't see why noise should be a problem in the design although a full schematic of the sensing circuits would be useful. An LPF should suffice, other than that I think the next best solution would be to S&H when the pulse is present before measuring. I suspect the issue is the high impedance at the potential divider but dropping the resistors values will sink more current from the load. The op-amp should fix the impedance problem, assuming the voltage goes to a normal ADC.

Brian.

 

[KlausST]

Hi,

If I understand correctly, yhen you want:
20 kHz PSM --> low paas filter (averaging) --> DC value --> ADC.

Now you need to know that after an LPF there still will be ripple. Thus you need to specify how much ripple you can tolerate.
But the less ripple ... the longer the settling time. What settling time can you tolerate?
Both your values will define what filter order you need.

You say the output is noisy: I assume what you call "noise" is the remaining ripple.

And please be more precise. "Very noisy" tells nothing. With values with units we can calculate.
LPF can be a two part discrete circuit or high order active filter...

Klaus