High PSRR and low quiescent current bandgap circuit

[xxf_86]

In my LDO design I need a high PSRR and low quiescent current bandgap ciruit to make the LDO have a high PSRR. So does anybody have some good papers and technique about this.

 

[laglead]

You can find Ricon-mora's paper at ee department of georgia institute of technology.

 

[hrkhari]

Hi Guys:

Talking about BGR, I need to ask, How significant is the bandwidth of PSSR suppression in designing a BGR?. PSSR is a measure of the circuits ability to suppress common mode supply noise and variation. Since the distortion manifest at low frequency , does a BW of PSSR suppression of 1k or 10k is sufficient, or is there any other logic in selecting it?. Thanks in advance

Rgds

 

[laglead]

Hi Guys:

Talking about BGR, I need to ask, How significant is the bandwidth of PSSR suppression in designing a BGR?. PSSR is a measure of the circuits ability to suppress common mode supply noise and variation. Since the distortion manifest at low frequency , does a BW of PSSR suppression of 1k or 10k is sufficient, or is there any other logic in selecting it?. Thanks in advance

Rgds

It depends on the applications.
In DC-DC converter, you should attain low BW. But in general applications, tens or hundres BW is enough.

 

[lete]

Which process did you use? I think if you use CMOS to create your LDO you need a big compensation cap so it is difficult to get a high PSRR.

 

[jerryzhao]

I don't design LDO. But I think that paper maybe help you.
Khong-Meng Tham and Krishnaswamy Nagaraj "a low supply voltage high PSRR voltage reference in CMOS process" IEEE solid-state circuits, May 1995,