High logic level circuits

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PrescottDan

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Some logic circuits go from a high logic state to a logic logic state. Are these logic circuits called negative logic or inverted logic?

Why would you want a logic circuits that is Defaulted in a high logic state that needs a pulse to switch it to a low logic state? what advantage do it have

The power supply would be drawing more current because the logic circuits would always be defaulted in a high state that needs a pulse to switch it to a low state

Most logic circuits I have been around are defaulted at a low logic state and need to be switched to a high logic state

Why would a designer want all the logic circuits to be defaulted to a high logic state instead of a low logic state?
 

If both inputs of a 2-inputs NAND gate are high then its output is low. If both inputs of a 2-inputs NOR gate are low then its output is high. The "N" means it inverts.
They are logic gates so they do not default to anything.

If a logic gate is TTL then it draws a high power supply current all the time and its inputs float to a logic high if they are not driven low with a fairly high current.
If a logic gate is Cmos then its power supply current is almost nothing (unless it is oscillating at a high frequency which causes it to charge and discharge stray capacitance) and a floating input could be a logic high or a logic low.

A pulse does not cause a gate to change its output state and leave it changed. A flip-flop (or a counter that has many flip-flops) uses a pulse to change its output state and leave it changed until it is reset.
 

Most logic circuits are always defaulted to a logic low near zero volts

Other logic circuits are defaulted to a logic High and needs to be triggered or switched to a logic low

I don't understand why a designer would have a logic circuit defaulted to a logic high

When logic circuits are defaulted to a high state rather than a low state, this makes the components warm and hot and also the power supply has to source the current and voltage right?

because most logic circuits are defaulted to the low logic state near zero volts, so the IC chips and components are cold and the power supply is sinking the current and voltage?
 

You can make the same circuit either having the logic level be defaulted to a high or a low

A designer can make the same circuit be defaulted to a low or to a high

What I'm confused about is why would a designer would want to choose to have the logic level be defaulted to a HIGH

Because you can make the same circuit design but have the logic level be defaulted to a LOW
 

When logic circuits are defaulted to a high state rather than a low state, this makes the components warm and hot and also the power supply has to source the current and voltage right?
Logic circuits are not "defaulted".
Cmos logic uses almost no supply current so it never gets warm.
I haven't used TTL for about 34 years so I cannot remember if the output being high or being low makes it warmer because both makes it warm. Look on a datasheet.

because most logic circuits are defaulted to the low logic state near zero volts, so the IC chips and components are cold and the power supply is sinking the current and voltage?
Absolutely not. If you ever learn the details about TTL logic then you will know that an output has very high current when it drives a TTL input low (1.6mA max per input) but when it drives a TTL input high its current is only 40uA max.
 
If you ever learn the details about TTL logic then you will know that an output has very high current when it drives a TTL input low (1.6mA max per input) but when it drives a TTL input high its current is only 40uA max.

You're saying the a TTL low state draws MORE CURRENT compared to a logic HIGH?

how , why , i don't get it

I would think a TTL logic high would draw more current from the power supply and the power supply needs to source the current and voltage

I thought when a TTL logic level went low it sinks the current and voltage back to the power supply

Logic circuits are not "defaulted".

A designer can build the same circuit be reversing the logic states , exchanging the logic lows to a logic highs and vice versa

Why would a designer pick to use the logic state to be at a High logic level when there is No input signal?

When there is no input signal the logic levels are at a High logic level

Most logic circuits i have been around are at a low logic level when there is no input signals

There must be a reason or advantage why a designer wants the logic level to be at a high state level when there is no inputs

what are the reasons and advantages please?
 

You're saying the a TTL low state draws MORE CURRENT compared to a logic HIGH?
how , why , i don't get it
Look at a datasheet!!
The input of a TTL logic IC is the high current emitter of the input transistor, not its low current base. The datasheet lists the input low current to be 1.6mA max and the input high current is only 40uA max.
A TTL output can drive up to 10 inputs so its max output low is 16mA and its max output high is recommended not to exceed 400uA.

I would think a TTL logic high would draw more current from the power supply and the power supply needs to source the current and voltage
No.

I thought when a TTL logic level went low it sinks the current and voltage back to the power supply
No. A TTL input low needs a lot of current from a TTL output.

Maybe you are talking about a gate that has no load? Then its output current is zero and its internal current warms it both high and low.

A designer can build the same circuit be reversing the logic states , exchanging the logic lows to a logic highs and vice versa
Yes.

Why would a designer pick to use the logic state to be at a High logic level when there is No input signal?
I do not know whatr you are talking about because a logic input must never have no input. Its input must be high or low.

When there is no input signal the logic levels are at a High logic level
Only for a TTL input that is floating and is not connected to anything. So what? That is how TTL is made.

I am tired of talking to you about ancient TTL logic that is explained very well on the internet.
 
A TTL input low needs a lot of current from a TTL output.

I don't get how a TTL input low logic state need a lot of current

The internally input transistor inside a TTL logic IC chip needs a lot of current

a logic low is near zero volts but has very high current? the volt is in micro volts for a TTL logic low level

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A designer can build the same circuit be reversing the logic states , exchanging the logic lows to a logic highs and vice versa

Yes.

So when a circuit has a logic low it's called positive logic?
when a circuit has a logic high is called negative logic? reverse logic, inverted logic?

What would you call the two different designs? one is what type of logic and the other is what type of logic?

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A TTL output can drive up to 10 inputs so its max output low is 16mA and its max output high is recommended not to exceed 400uA.

I thought they made the TTL outputs at 16mAmp so it can drive multiple inputs , i didn't know the logic low needs more current for the internal input transistor inside TTL IC chips

Why it doesn't want to exceed 400uAmps for the high logic state? to not damage the internal input transistor inside the TTL IC chips? but why would 400uAmps damage it , thats very small current to damage a transistor
 

You know NOTHING about a TTL gate IC. Look at its datasheet. Its input is a high current pulling down of the emitter of the NPN input transistor, not a low current pulling up its base.
A TTL logic low is about 0.4V, not micro-volts.

Since one input low has a max current of 1.6mA and a TTL gate is designed to drive up to 10 inputs then its max output low current is 1.6mA x 10= 16mA.

They designed a max input high current of only 40uA (and a max output high current of only 400uA) because that is the emitter current of the input transistor for it to turn off. No damage. When it is turned on with 1.6mA it is also not damaged.
 
Its input is a high current pulling down of the emitter of the NPN input transistor

What kind of circuit is this? or what kind of biasing configuration is this?

I never heard of a high current pulling down emitter

Since one input low has a max current of 1.6mA and a TTL gate is designed to drive up to 10 inputs then its max output low current is 1.6mA x 10= 16mA.

The TTL output is outputing 16mA, the input to the next TTL max current is 1.6mA

16mA output going to a max 1.6mA = damaging the input right?

They designed a max input high current of only 40uA (and a max output high current of only 400uA)

The output high is 400uAmps going to a max input current of 40uA

400uA output to a max 40uA input = damaging the IC input right?

input transistor, not a low current pulling up its base.

What are u talking about? a low current pulling up a transistors base
 

You will not learn anything if you do not look at the datasheets. Look at the schematic of an SN7400 TTL gate on its datasheet to see the inputs are the emitters of the input transistors.

The maximum output low of a TTL gate is 16mA. It does not "force" the 16mA, a load takes only as much current as it needs. One TTL input low takes only 1.6mA max.
The maximum output high of a TTL gate is recommended not to exceed 400uA so an input high that is only 40uA takes only 40uA.

Please use common sense:
The maximum output current of your car battery is hundreds of Amps so the starter motor can rotate a freezing engine to start it but the clock in the car does not take the hundreds of Amps and get damaged.
The clock probably uses less than 0.001A.

A transistor has a much higher current on its collector and emitter than the very small current on its base. But the input of a TTL gate is the high current emitter of the input transistor so that it can switch fast, not the low current base. See it on the schematic of the gate in its datasheet.

EDIT: I added the schematic from the datasheet.
 

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I looked at the datesheet schematic

So what you're saying is that when you use a transistors emitter as an INPUT, you need alot more current compared to using the transistors base as an input?

Also they are using that input transistor as a series pass transistor right?

It has 2 emitter inputs because they want both inputs to be "Tracking eachother"?

The Diodes on each Emitters input is for protection of a negative voltage on the input?
 

I looked at the datesheet schematic

So what you're saying is that when you use a transistors emitter as an INPUT, you need alot more current compared to using the transistors base as an input?
Of course.

Also they are using that input transistor as a series pass transistor right?
Sort of. When the emitter goes low then the base current is much higher which causes the transistor to turn on more so that its collector also goes low.

It has 2 emitter inputs because they want both inputs to be "Tracking each other"?
No, it is a NAND gate, the inputs do not track each other!. When both inputs are high then its output is low. When either or both inputs are low then its output is high.

The Diodes on each Emitters input is for protection of a negative voltage on the input?
Yes.
Series inductance causes ringing. A piece of wire or a track on a pcb has inductance at the high frequencies these gates can operate at. Then an input has a series inductance and has ringing. The ringing on a logic low can swing below ground which will damage the emitter-base so the diodes clamp the negative voltage swings.
 
No, it is a NAND gate, the inputs do not track each other!. When both inputs are high then its output is low
.

I thought they tracked each other because if you used two separate transistors instead of one transistor with 2 emitters , one collector and one base , the tracking each other would be offset and unbalanced thats why they use that one transistor with 2 emitters

I guess tracking each other only is for when a transistor is an amplifier and not a switch

Because I have seen on schematic how they use 2 transistors back to back or in series so they track each other

I'm not really sure how this tracking each other works or why you would want to do this

I think it's for log amplifiers
 

The input is an AND gate. There are lots of ways to make an AND gate. Then the remainder of the circuit is an inverter that makes it a NAND gate.
 

The transistor with 2 emitters is called a Tetrode transistor

Any reason why they used a Tetrode transistor instead of using two separate transistors?

This is what is says:

Collector current stops flowing only if all emitters are driven by the logical high voltage
 

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