[SOLVED] Hierarchical block is unconnected

[jasmine123]

   module modified_vedic_multiplication(q1,u,q2);
   input [19:0] q1;
   input [19:0] u;
   output [19:0] q2;
   wire [31:0] d,g,temp1,temp2,temp3,e;
   wire [15:0] temp4;
   wire c1,c2,c3;
   wire [7:0] f;
   vedic_16bit y0 (q1[15:0],u[15:0],d[31:0]);
   vedic_16bit_modified m1 (u[15:0],q1[19:16],g[31:0]);
   vedic_16bit_modified m2 (q1[15:0],u[19:16],e[31:0]);
   vedic_4bit m15 (q1[19:16],u[19:16],f[7:0]);
   assign temp1 = {4'h0,d[31:16]};
   full_adder_32bit_reversible r0 (e[31:0],g[31:0],1'b0,temp2[31:0],c1);
   full_adder_32bit_reversible r1 (temp1[31:0],temp2[31:0],1'b0,temp3[31:0],c2);
   assign q2[11:0] = temp3[15:4];
   full_adder_16bit_reversible r2 (temp3[31:16],{8'b0,f[7:0]},1'b0,temp4[15:0],c3);
   assign q2[19:12] = temp4[7:0];
   endmodule

     module full_adder_16bit_reversible(a,b,cin,sum,carry);
     input [15:0] a,b;
     input cin;
     output [15:0] sum;
     output carry;
     wire c;
     full_adder_8bit_reversible a12 (a[7:0],b[7:0],cin,sum[7:0],c);
     full_adder_8bit_reversible a13 (a[15:8],b[15:8],c,sum[15:8],carry);
     endmodule

     module full_adder_8bit_reversible(a,b,cin,sum,carry);
     input [7:0] a,b;
     input cin;
     output [7:0] sum;
     output carry;
     wire c;
     full_adder_4bit_reversible a2 (a[3:0],b[3:0],cin,sum[3:0],c);
     full_adder_4bit_reversible a3  (a[7:4],b[7:4],c,sum[7:4],carry);
     endmodule

WARNING:Xst:1290 - Hierarchical block <a13> is unconnected in block <a10>. It will be removed
from the design.
WARNING:Xst:1290 - Hierarchical block <a13> is unconnected in block <a10>. It will be removed from the design.
WARNING:Xst:1290 - Hierarchical block <a13> is unconnected in block <r2>. It will be removed from the design.

The simulation result is correct, but I keep getting these warnings. The trouble appears to be in the a13 module. But I am not able to figure it out.

 

[FvM]

Instance a10 isn't shown in your code snippets, but for r2, the upper byte of result temp4 and c3 are unconnected. Thus a13 has no output and is removed during synthesis.

 

[Akanimo]

Hi,
Check well. There is a module that you have created but have not used at the top level. You probablyou have listed it in the top level module but you have not made any connections to it. This is the most likely cause of this message.

 

[jasmine123]

I got it. the load of a13 was stuck at zero. hence the warning.