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Hi, I'm very new in verification, have some questions...

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dexter_ex_2ks

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I'm very new in verification, I need some books suggestions. I know that verification can be made in SystemVerilog,SystemC,Vera,e, and C++.
But I need some suggestions for books to start to read. Something that will contain theoretical part + examples. (For the moment I'll use some free tools like tea&truss which is for C++. Does anybody know these two programs? Are they good? Can I use them for study? Is there a major difference between them and the others?)

Thanks in advance
and
Have a nice day !!!
 

Thanks for the suggestion.

But I need to practice and I think that specman it's not free. I have another question, SystemVerilog it's a language or a program, because if it's a language, I'm shore that I can find a free program with SystemVerilog integration. I was asking for a suggestion for a book with theoretical & practical exercise. I've read about this book on amazon, and it's a very good book,but how can I practice verification with no specman (so I don't think it's a good idea to buy this book because I can't exercise and it's a lot of money).

SystemVerilog it's powerful or not in verification, and is there a free tool for learning purpose ?

Thanks again in advance
and
Have a nice day !!!
 

I think the best way to learn verification is to write a testbench to verify a design!
 
If you are looking for a fully opensource platform for modern verification use TEAL/Truss + ICARUS (I believe you are doing that already). This is the best bet as of today. BTW, TEAL/TRUSS is very much industry strength framework, being used at several companies, but you need good C++ folks interested in HW verification - not so easy combination to find.

Other than that, industry is for sure moving towards SystemVerilog, free tools - no, eval versions yes (Try Aldec for example).

We have VIPs being created using TEAL @CVC here. And this is part of our dV-Incubation soon coming up @CVC!

Cheers
Ajeetha, CVC
www.cvcblr.com
 
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