[SOLVED] Help with Latch IC 74LS373

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sharikbaig

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Hi All,
I never had a previous experience with Latch IC 74LS373 (DataSheet Attached). The only doubt i have is " Is it necessary to apply a signal to CP (clock) pin, if yes what kind of signal and from where it can be obtained?".
Any help would be appreciated. Thanks in advance !
View attachment sn74ls373rev5.pdf
 

If you read the general operation at the start of the data sheet you can see that when LE is high, data is copied from input to output and when LE goes low, the data is latched. It uses LE rather than a pulsed clock, but the result is the same.
 

Yes, and as the datasheet is also mentioned, only the 374 has a CP (clock) pin while the 373 uses a static LE pin. However, the 374's Truth Table header is wrong, here is no LE, read CP instead. This CP is dynamic (the rising edge is used only) while the 373 LE is level sensitive (the high is active).
 

Oh My ***! How couldn't i see it. Thank you so much guys. You were really helpful.
I think i need rest.
Thanks!
 

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