Help with first LVDS PCB design

[Slatye]

Hello everyone,

I'm embarking on my first high-speed LVDS PCB (also my first 4-layer PCB) and I'd like to get some advice before starting out. This will be a camera board with five differential pairs (4 data + 1 clock) at around 400Mbps, needing 100-ohm differential impedance, and it'll end up going into an FMC connector (via a Hirose DF40) so I can get the data into an FPGA. I'm planning to use Elecrow's 4-layer PCB prototyping service with stripline on the surface, and a ground plane on the second layer (separated by the 0.195mm bonding layer).

I'm working on Altera's board design guidelines, which state that (a) space between the conductors must be less than twice the width, (b) thickness of the board (I assume this means between the LVDS layer and its ground plane) should exceed space between conductors, and (c) space between adjacent LVDS pairs should be at least twice the space between the conductors of one pair.

I've hit two main problems:

(1) The second recommendation is quite challenging. Since their minimum preferred track spacing is 0.2032mm, I can't meet that requirement at all (apart from going to non-preferred spacing). Is there a recommended solution, apart from pushing the process limits and going to maybe 0.18mm track spacing?

(2) All the impedance calculators disagree. The setup I'm looking at is Elecrow's standard 4-layer PCB (35um copper thickness, dielectric 4.6), 0.22mm tracks, and 0.18mm spacing. I can then make the pairs 0.42mm apart, meet the Altera requirements for pair spacing, and still get onto a DF40 connector with a GSSGSSG pattern. However, when I calculate the impedance I find:

The EEWeb calculator says this produces a differential impedance of 118 ohms.

The Skottan calculator says 99.85 ohms, which is perfect (this is the calculator I used to get those figures)

The EverythingRF calculator says 97.35 ohms.

Saturn PCB calculator (which I see recommended often) says 88.591 ohms.

The All About Circuits calculator says 118 ohms.

The Hughes Circuits calculator says 118 ohms.

The Mantaro calculator says 97.328 ohms.


Am I missing something here? I would have thought that LVDS was a fairly mature technology now, but going to five calculators and getting four different answers is not exactly encouraging.

Any advice would be very much appreciated.

Thanks,
Evan

 

[marce]

Why such a large space between tracks, I'd do this design at 0.125 trace width 0.1 space between traces, 18 um copper to start.
Also ditch the sill 4 place sizes, use 0.2mm everything is metric these days, ditch the silly thou references in sizes and spaces. Look at IPC-7351 the library of the future, BGA breakout books etc.

 

[FvM]

I can confirm the 99.85 ohms number, or about 102 ohms when using a more realistic trapezoidal track profile. But even the extreme outliers are still in the range of useful LVDS operation.

I confirm your intention to get optimal designed impedances from the start, but you need to calculate large variations due to FR4 permittivity and PCB manufacturing tolerances, if tighter than e.g. 20 % tolerance, you need to go for impedance controlled manufacturing. This variation would be however still acceptable for LVDS operation.

Differential pair spacing and expectable crosstalk is a complex topic. I'm used to apply design rules with staggered (depending on parallel running length) clearance.

 

[Slatye]

Thanks to both of you for the replies so far!

Why such a large space between tracks, I'd do this design at 0.125 trace width 0.1 space between traces, 18 um copper to start.
Also ditch the sill 4 place sizes, use 0.2mm everything is metric these days, ditch the silly thou references in sizes and spaces. Look at IPC-7351 the library of the future, BGA breakout books etc.

The reason for the track sizing is simply because of what Elecrow can manage (8 mil recommended minimum track width and track spacing, 6 mil absolute minimum). I'm trying to keep this board as cheap as possible (with their 10 10x10cm 4-layer boards for about $50 offer), although it's becoming clear that I might need to spend a bit more on this one. Any suggestions for a cheap PCB manufacturer that can do 0.125 trace and 0.1 spacing?

I try to use metric (and round numbers) for everything when I can, but when I'm pushing the limits of the process there aren't many options.

I can confirm the 99.85 ohms number, or about 102 ohms when using a more realistic trapezoidal track profile. But even the extreme outliers are still in the range of useful LVDS operation.

I confirm your intention to get optimal designed impedances from the start, but you need to calculate large variations due to FR4 permittivity and PCB manufacturing tolerances, if tighter than e.g. 20 % tolerance, you need to go for impedance controlled manufacturing. This variation would be however still acceptable for LVDS operation.

Differential pair spacing and expectable crosstalk is a complex topic. I'm used to apply design rules with staggered (depending on parallel running length) clearance.

Right, that's good to know. It sounds like it might be worth doing a run of boards with Elecrow on this process, and if they're not working well enough then spend the extra on getting them done with the impedance controlled manufacturing process.