jake
Member level 2
Hi all,
When I do the gain and phase simulations for an OPA, I encountered a strange issue. The gain of the second stage is minus. All the transistors are worked in normal state, that is, they are in saturation state. The input signal is applied as the figure. The positive input IP is a 0.5V direct voltage, And the inductance and the capacitance are huge.
Who can help me?
Regards
jake
When I do the gain and phase simulations for an OPA, I encountered a strange issue. The gain of the second stage is minus. All the transistors are worked in normal state, that is, they are in saturation state. The input signal is applied as the figure. The positive input IP is a 0.5V direct voltage, And the inductance and the capacitance are huge.
Who can help me?
Regards
jake