help us design a SOC: a problem with dpll

[handsome]

help:about dpll

My group design a SOC. As you know,the SOC need a pll to provide higher clock ,but we can not find a proper pll in .25 process. so we decide use a high oscillate and dpll to resolve the probleme ,but i am a beginner ,i do not know how to implemet it . Will you please tell me about how to implemet it and where can i find some meteraials about implement and dpll.Thanks in advance !!!

 

[gerryhsu]

Re: help:about dpll

Here is some tutorial, hope it helps
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[casual3_2002]

Re: help:about dpll

could you be more specific about the design? like the frequency, etc. I just did one adpll design, however, the implementation all depends on your applications.

casual3

 

[khouly]

Re: help:about dpll

there are many resiurce about PLL

u can visit
www.circuitsage.com

 

[handsome]

Re: help:about dpll

thx !

My boss has decide to implement thc Chip in .18um process,so we can license proper PLL . thx !

 

[khouly]

Re: help:about dpll

this is some usefull lectures about PLL
i hope u enjoy it

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