Help understanding LM3880 power sequencing chip

[Hawaslsh]

Hello,

I am thinking of using a simple power sequencing chip from Ti, LM3880, to toggle the enable pins for a few voltage regulators. I posted the block diagram above. The chip's operation is quite simple. You toggle an enable pin and you get the following timing diagram for the three flags (outputs). On the left is the power up sequence, and the right power down.

I must be missing something crucial. Below is the recommended schematic. We are placing pull up resistors to the open drain outputs of the three flags (outputs). There is where my question lies. With no power to the LM3880, won't the open drain outputs be high impedance until a voltage is applied to the gate? Wouldn't this mean when Vcc is applied to the circuit, the flags would be pulled high by the pullups until the MOSFET turns on (has a votlage applied to its gate)? Clearly not, or TI wouldn't be saying so, what am I missing?

I had one other question. If one of the regulator's enable pin has a maximum rated voltage of the flag's output value. Could I simply use a voltage divider to drop the votlage to the regulators enable pin as below? The en pin draws 250uA according to the data sheet, seems ok?

Thanks in advance!

 

[KlausST]

With no power to the LM3880

Here's the point:
In the shown diagram .. the input power is not removed.
--> the EN input controls the sequence.

And for sure you can use a voltage divider,
* or a zener to limit the voltage,
* or connect the pull up to the power supply (voltage) you like.

Klaus

 

[D.A.(Tony)Stewart]

The outputs are just enable signals with with high impedance pullup to enable a regulator with +V And low impedance ground to disable.

 

[danadakk]

These are all part of a SOC, can be used w/o using rest of chip, just for this
purpose (up to 32 DC/DC) :

Data sheets attached.

Lots of other stuff onchip, if you want I can post an abbreviated pic of those.


Regards, Dana.