Re: [Help]Switched Capacitor filter and charge injection pro
GDF
Do you have any suggestion for simulation to check the circuit does
get rid of charge injection?
Yes. To simulate charge injection in a modified SC (where a transmission gate is used), you need two sources (1) an analogous voltage source at the Drain of NMOS and Source of PMOS (2) a clock source to Gate of NMOS and PMOS. Both sources have a maximum voltage to Vdd and minimum to 0Vdc. Probe the Source of NMOS for result. Analyse the transience.
You can use Cadence HSPICE or OrCAD PSpice A_D to simulate this.
To simulate advanced clocking, use two clock sources such that Clock1 is arrives slightly earlier than Clock2. Clock1 is fed to the Gate of shunt NMOS to ground. Clock 2 is fed to either a transmission gate or NMOS, depending a modified SC or novel SC.
About THD, technically all digital signals are accurate to 5th or 7th harmonics. Sometimes 3rd will do fine. Most of the energy still resides in fundamental frequency.
For THD, use THD+N, because considering the noise, n, will be more accurate than anything.
I presume you know the formula for THD which is:
THD (%) = {√[ (H2)² + (H3)² + n²] / {√[ (H1)² + (H2)² + (H3)² + n²]} x 100%
Clock feedthrough is unrelated to charge injection and it is independent of analogous input signal. It is only dependent on the clock signal. Clock feedthrough is the clock signal coupling from the clocked Gate to both the drain and source of NMOS. But since we are only concerned about the output at the Source of NMOS, it adds harmonic distortion to the sampled output. This is especially important when the clock uses high frequency and this is a key consideration in current RF oscillator and mixer design. Clock feedthrough is as important as LO leakage.