Help on UVM vs OVM, any big gains?

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RCircuit

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my boss wants me to convert OVM to UVM. I dont see big gain after surfing the net. Can anyone give points on advantages of uvm? Big thx.
 

The key advantages of moving to the UVM are not technical, they have to do with ecosystem around the UVM.
  • You will find more Verification IP ready for use in UVM than OVM.
  • All of the major simulation vendors are building debug and analysis tools around UVM, not OVM
  • After you leave the project, (or the company), or if your project needs more resources, it will be easier to get other people already trained in UVM. If not, there are many more resources for learning the UVM.

Migrating to the UVM doesn't mean you need to use all the new features in the UVM. In fact, if you remove the OVM features like the sequence library that were deprecated in the UVM, there is less to learn about the UVM than there was in the OVM. There is really only a few features new in the UVM that will make your job easier: the parameterized config_db, the command line processor, and the Register Abstraction Layer.

https://verificationacademy.com/seminars/uvm-recipe-ovm-to-uvm-migration#
 

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