Help on understanding an amplifier based clock buffer

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poorren

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Hi guys,
I'm trying to buffer and transfer high quality 10Mhz clock to external device. With the requirement of external device, I need to amplify this clock signal by Gain of 2. After reading a article from analog device, see link below.

https://www.analog.com/library/analogdialogue/archives/42-05/clock_buffer.html

It seems that it's good to use amplifier in my case. Because, I need to couple this clock buffer in AC mode. So, I select figure 3 (unity gain, see attachment) schematic as design base. But, I have a bit confusion on that circuit and his comment. I notice that it ties the output load resistor R5 to +0.5V, and give a explanation that

Note that the load resistor is returned to a voltage that is the dc average of the input signal. This ensures that the output will be referenced back to ground.

I couldn't understand this point much clear, why that resistor needs to return to voltage of dc average of input signal? what doesn't mean "reference back to ground "? In my view, it could simply to tie to GND.

So, please help to look, any comment or feedback is welcome! Thanks advance!

Cheers,

Jeff

 

If you reference it to ground the amplifier will at best give a very distorted output.
Think of it this way:
1. You have 100% negative feedback so there is no voltage gain although there may be power gain.
2. The output voltage will follow the input voltage.
3. If you bias the input to half the supply voltage, the static (no signal) output will also be half the supply voltage.
4. The output signal is centered on half the supply voltage so it can swing the maximum possible amount between ground and supply voltage before clipping.

If you reference the input to ground, the static output will also be at ground voltage so you would only see signal excursions in one direction, it would make a crude rectifier!

You may be confusing ground referenced inputs with a similar circuit where the amplifier sits between positive and negative supply rails. In that situation the static voltage can be zero but the output will swing both positive and negative.

Brian.
 
The output side of C6, without R5 will have the clock signal on it with the mean DC level of this signal situated at earth. So if the AC signal has a 1 microsecond 5V positive pulse with a 9 micro second "0", on the output side of C6 will have a signal of +4.5V going down to -.5V. i.e. the area of the pulse above the 0V line will equal the area below it. R5 puts some bias on the signal to compensate for this. In my example the bias should be +.5V. It would be easier and better to replace R5 with a diode, cathode to earth, This will clamp the most negative part of the pulse train to the diodes forward conduction voltage, -.7V? IRRESPECTIVE of the shape of the pulse train.
Frank
 
The 0.5 V bias level seems suitable for the signal shown along with the unity gain buffer, which is 1 V peak-peak with 50 % duty cycle, apparently intended to swing between 0 V and +1 V. Different clock waveforms will require different bias levels. We have to ask for your clock specification.

Connecting the bias resistor to ground would result in a +/-0.5 swing.
 
Hi chuckey,
Your idea and suggestion give me the direction to figure out why we need bias to positive voltage. I didn't notice that the duty cycle matters in this way. And, your suggestion on diode also helps much.

Thanks a lot! Also, my thanks to FvM and Brian!

Nice day,
Jeff


 

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