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Help Needed with ASIC - need to speed up

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guesswho

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Help Needed with ASIC

I have been given an assignment.

I have to implement Mano Machine in ASIC but before that i need to learn ASIC.I have got Smith's book.

Can ne1 tell me more faster way of doing it.Moreover the tools and stuff i will be needing etc etc.

Thanx in advance.
:D
 

Hi,
I think ASIC design is very complex. And have to know much things. Normally it will take you half year to master it basic flow and basic tools.
Why not use FPGA and get help from FPGA vendor to convert FPGA to ASIC?
 

Help Needed in FPGA

Can u help me in implementing it on FPGA.
I have no idea about it also.
:cry:
 

In the ASIC field, I think the following book is a good reference material.

"THE ASIC HANDBOOK" Nigel Horspool & Peter Gorman

ISBN 0-13-091558-0
 

Oh, yes.
It's a good book.
I bought one yesterday. :wink:
 

Hi, guesswho
How can I help you?
If you don't use FPGA, I suggest you use @ltera software MaxplusII ,it's very easy to use . But before use it ,you have to estimate you design size in order to your fpga chip can accormadate your design.
 

linuxluo,

guesswho may mean a consultancy work.
his assignment may be a part of a commercial project ??


frank,

Are you sure this is a good book? I browsed the book in book store and I doubt very much about its title, ASIC Handbook. It is just some talks about the everyone (I mean chip designer) known stuffs.. but they just put these "common sense" in papers.

"THE ASIC HANDBOOK" Nigel Horspool & Peter Gorman

ISBN 0-13-091558-0
 

Hi, ntxp
What his said means that he is a freshman in ASIC design, So I think the fastest prototype and easiest way is FPGA. You know, ask freshman to design a ASIC is impossible. That's what I think. :)
And I also agree that the book is commonsense.
 

If you decide to start with FPGA "and I prefer that" you will find a lot of tutorials from FPGA vendors and you will also defer the problems of back end problems of ASIC. Also for digital design the front end process are the same (Design captue, synthesis, simulation) and as the Place&Rout statrt the flow of FOGA and ASIC differ.
 

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