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Help needed in VHDL FSM sequence detector 0111 and 0101

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mukulpatwal

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Help needed in VHDL FSM sequence detector 0101​

Draw fsm and write VHDL code for a system which has is single bit input x and two single bit outputs Y and Z. output of system is asserted logic 1 to Y and Z when system detects in input stream of serial bits 0111 or 0101 respectively
 

We do not spoon feed students here and do their homework!
Show us what you have understood and done for this problem.
Tell us the problem part which you have difficulty in understanding.
 
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Help needed in VHDL FSM sequence detector 0101​

Draw fsm and write VHDL code for a system which has is single bit input x and two single bit outputs Y and Z. output of system is asserted logic 1 to Y and Z when system detects in input stream of serial bits 0111 or 0101 respectively
You're not asking for help, you are asking someone else to do your work for you. Not going to happen.
 

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