Hello , I am new into Physical Design . I have few questions regarding it , whom answers i didn't got. ... please help me out and excuse me if my questions are not upto standards .
I am working/training on an design called ORCA. We have been given specifications ... I have few doubts regarding that ..
1) The core utilization %age is 80% ... so how do we calculate it ... why is it 80 % ...
2) Target IR drop is 10% of supply voltage ? I asked many but answers i got was :-( ... why isn't 12% or 8% ... how to come up to this %age figure ...
3) when i increased core utlization area to 90% , my macros got placed outside core area ... ????? ... so does it mean that increase in core utilization area decreases width and height ? ...
4) why do we remove all placed standard cells , then write out floorplan in DEF format ... what's use of DEF file?
5) Can area recovery be done by downsizing cells at path with high timing slack (+ve) ...
I hope above questions are relevant and upto standard of EDAboard.