Who can help?
Please explain this line command :
write_sdf -version 2.1 -context verilog asic_top_21.sdf.
the parameter (-context verilog) has any function
without this switch the bus names in your sdf do not match your netlist and this may cause problems in simulations. if you have a verilog netlist its always better to specify "write_sdf -context verilog mysdf.sdf" so design compiler uses proper brackets[] for bus delimiters of your sdf. without this switch a 5-bit bus may appear in your sdf as busx4:0x but with -context this bus shows up as bus[4:0]