Help me with FSM design

[alpeshchokshi]

Hi Friends,

Can any body help me with the designing of FSM of below problem???


Design a logic which mimics a infinite width register. It takes input serially 1 bit at a time. Output is asserted high when this register holds a value which is divisible by 5.


Input Sequence Value Output
1 1 1 0
0 10 2 0
1 101 5 1
0 1010 10 1
1 10101 21 0

Thanking you in advance

Regards,

 

[ankit12345]

fsm for infinite width register

develop state mechine for reminders.......

store information abt reminder........
when 1 is addted to left of the number.....then reminder is doubled and incrimented by 1
if 0 is added to the left......then the reminder is doubled......

I think u got some idea......

Develop statemeching based on this........
this is one of the basic interview questions

I wish u to do and gain some knowledge....