Help me with charge pump design in low voltage technology

[opamp741]

charge pump design

I am designing a charge pump(voltage doubler , volatge trippler ) in a low voltage technology.My problem is the power effeciency of the charge pump.I am not ablle to achieve power efficiency greater than 75%.
Technlogy parameters
voltage=1.2v
|vt| (nmos, pmos)=0.40

Can any one please suggest me the concept behind it and help me in achieving power efficiency around 90%.references regarding this is most welcome.

 

[batdin]

Re: charge pump design

I personally think that 75% is fine when Vin=1.2V
To increase efficiency,try using switches with smaller Rds_on.This is all I can come up with.

 

[goodboy_pl]

Re: charge pump design

ther is a trade-off between transistor size and efficiency:
larger transistors need more charge at their gate, thus there is a optimum value for the size.

BTW, I think 75% efficiency is not so bad specially if it is low power!

BEST!

 

[alphi]

Re: charge pump design

It is about mosfet efficient with switch lose.
I think you can ref max202 theory?

 

[opamp741]

Re: charge pump design

But i need to increase the power efficiency above 85%.So any body could suggest some reference

 

[jordan76]

Re: charge pump design

For traditional structure,you can try use native transistor(vt=0) to improve power efficiency suppose vout and vdd is fixed.

Also you can refer to "Charge Sharing Concept and New Clocking Scheme for Power Efficiency and Electromagnetic Emission Improvement of Boosted Charge Pump", IEEE JSSC,Vol 35,No.5,May 2000

regards,
jordan76

 

[opamp741]

Re: charge pump design

Can anyone provide me good IEEE references on charge pump.

 

[sunking]

Re: charge pump design

you can improve the gate voltage(such as bootstrap) of switch mos fet for high effciency.
btw, the effciency is a function of output current. If you added the output current, the effciency will increase.

 

[sugar_luo2003]

charge pump design

Using the low Vth transistor and high gate voltage which beyond your power range will incrase the effeciency.

Or you must use the external device such as very low impedance switch.

The issue is the low impedance you got, the high effeciency you got

sugar

 

[leonken]

Re: charge pump design

what is meaning of " high gate voltage which beyond your power range will increase the efficiency"
Please give me some explanations or some papers?
thank you

 

[leonken]

Re: charge pump design

I want to design a switched mode power supply.I want to reduce the mosfet driver consupmtion.
The lower threshold voltage means the higher speed.
How the low threshold voltage can reduce the power consumption?
For my case, the vt=0.4V ,so, it has necessary to reduce the vt use body effect or not?

 

[mag]

Re: charge pump design

"high gate voltage" will reduce mosfet RDS_on,so it can increase efficiency.
Low gate cap(miller cap) can reduce gate drive current,But for same mosfet,Higher frequency will reduce efficiency.

 

[joelo]

charge pump design

Your problem is very good point,
I perfer you that see http://www.discovercircuits.com/C/charge.htm

 

[electronrancher]

charge pump design

wait, switchmode power supply is different from the integrated charge pump that opamp is talking about.

for smps, you usually connect a boost capacitor to the LX line, and then have a shottky diode to vin. as LX falls, the boost diode is filled to VIN. When LX Rises, the boost cap follows up to 2*VIN. No other pumping is needed in SMPS.

Now on to opamp's question - opamp, I have a bunch of references on charge pumps. Maybe too many to post here - can you tell me the topology you use? Then I think I can help you more.