[SOLVED] Help me understand compensation diodes and biasing

[thenendo]

I'm currently working my way through Horowitz and Hill's Art of Electronics, on my own with the student manual and wikipedia for help .

I have made it through chapter 1 relatively unscathed, my mind expanded, and I feel like I'm really starting to understand RC circuits. Except... voltage biasing, which comes up toward the end of the chapter as one of their examples of how useful diodes are. Let me real quickly set up the circuit...

This is a leading edge detector. The idea is that some varying voltage signal is applied at "in", say a square wave, and at "out" we get a voltage pulse for the leading edge of each input square wave. This works because on the leading edge of a square wave, dV/dt is very large, and so the impedance of the capacitor is very small, so the signal passes through it unmolested. If it's a leading edge, the signal is positive, and so it passes through the diode and the voltage at out is proportional to it. If it's a falling edge, no current gets through the diode, and the output is pulled low by R3. During every other part of the square wave (the peaks and troughs), dV/dt is very small, so the impedance of the capacitor is large, and very little of the signal gets through it; "out" is a constant LOW in between leading edges.

So this gives us an output of positive pulses coinciding with each leading edge of the input square wave, their amplitude proportional to the amplitude of the input, minus the voltage drop of D2. This last point is a problem, because if D2 has a forward voltage drop of 0.6V, then this circuit won't output anything on the leading edges of square waves with amplitude < 0.6V. Horowitz and Hill claim that this problem can be solved by adding another diode with the same voltage drop together with a constant positive "bias" voltage. Here's the circuit they give:

I can't quite see how this is a solution, and I was hoping somebody more knowledgeable than I am could explain where my reasoning goes wrong.

Let's work through what happens on the leading edge of a square wave with amplitude < 0.6V, say it's 0.3V. It's the leading edge, so the impedance of the cap is near zero. So the input signal passes through, and the voltage at point A is 0.3V. At the same time, because D1 (which they call a "compensation diode") has forward drop 0.6V and it's tied directly to ground, we know that the voltage at point B must be 0.6V (and hence the voltage drop across R2 is 4.4V). If B has 0.6V and A has 0.3V, current flows up from B to A with a voltage drop of 0.3V across R1. It seems to me that we have accomplished nothing... the voltage of 0.3V at A is less than the forward drop of D2 (0.6V), and so "out" sees nothing but ground.

Horowitz and Hill speak as if the 0.6V at point B (which they call "bias" without further explanation) somehow boosts the total across D2 so that a voltage of 0.3V (or something) will be left at "out". But how is this possible? I thought we never ADD voltages into a point, as if voltage were current. I can't reconcile what Horowitz and Hill say with Kirchoff's voltage law, so I must be doing something wrong. Any help is appreciated. Google is failing me :???:

 

[jony130]

The bias current will flow in this loop
+5V ---> R2---->R1---->D2---->R3---->Gnd .
And becaues this bias current will be very small the voltage drop across R1 will also be small.
Ib = (VD1 - VD2)/ ( R1 + R3)
So almost all voltage drop from D1 will be across D2.
D1 is in parallel with R1, D1, R3

 

[FvM]

This is where your considerations start to get wrong:

It's the leading edge, so the impedance of the cap is near zero. So the input signal passes through, and the voltage at point A is 0.3V.

The purpose of the capacitor is to "pass" AC voltage and block DC voltages. In other words, it allows for different voltage levels at both sides. You preferably determine the voltage levels without an input signal. A and B can be expected to have almost the same voltage, about 0.6 V, as jony130 mentioned. When you apply an input AC signal, the voltage difference across the capacitor will be kept. So 0.3 V positive signal in gives 0.9 V at node A.

I hope, you can proceed from here.

 

[chuckey]

The idea that I have is that you should regard the "bias" diode as a current source. Suppose 2 micro amps is diverted down the main path, this current then puts a voltage drop across R1, R3 and the forward slope resistance of D2. So the voltage drop across D2 is less then the "magic" .6V across D1. So on any positive going pulse D2 just conducts more but when the pulse goes negative any current greater then - 2 micro amps cuts D2 off. So the benefit is that there no forward voltage offset on a positive going pulse but at the expense of the -2 micro amp reverse current which can be more useful. using two diodes of the same type also cause temperature effect to be balanced out.
Frank
Frank

 

[thenendo]

Thanks guys, I think I mostly get it now. First, I imagine how the circuit behaves if there is no AC input, so that basically nothing gets through the capacitor (its impedance is very high). As jony130 and chucky point out, the current flowing from B to A (across R1) must be very small, since most of the current out of B will go through the diode to ground (the diode has very low resistance). Thus the voltage drop across R1 is very small, and so the voltage at B is practically the same as it is at A, namely the forward voltage of D1, which is the same as the forward voltage of D2, and so D2 conducts.

Now imagine adding an AC signal to the input. That AC signal might have some non-zero DC mean (bias), but the capacitor in series with it essentially removes that mean/bias ("capacitive coupling"), and only lets through the AC fluctuations centered around a nominal 0V DC bias. Now the tricky part: those output AC fluctuations get superimposed onto whatever DC bias might independently be present on the output side of the capacitor. In our case, we have set up a 0.6V bias there, so if an AC signal with amplitude 0.3V comes in, that gets laid on top of the 0.6V bias to make a total of 0.9V, so there is always enough forward voltage to cross D2.

Or another way to put it: the AC output voltage on the right side of the capacitor is not +0.3V relative to ground, it's +0.3V relative to whatever the bias on that side of the capacitor is, in this case 0.6V; so the voltage at point A is really 0.9V relative to ground. This makes sense if you think about how a capacitor works (charges on plates).

I feel like Horowitz and Hill could be more clear and explanatory about this stuff... now voltage doublers are starting to make more sense to me, too