Help me to find the squareroot of a number using verilog

[Sreya39]

verilog code for square root algorithm

Hi frenz,

I am in need of the verilog code to find the squareroot of a number.. If anyone knows plz.. help me.. its very urgent to complete my project...

Thanks and Regards,
Sreya

 

[echo47]

verilog programs+square root

Verilog provides $sqrt and other math system functions.

In answer to your other question, Verilog also provides a fully functional '/' division operator.

If your particular software tools don't support those Verilog features, then you need to give more info about your tools and what sizes and types of numbers you are trying to calculate. Also search your software tools IP library for square root and division modules. Many tools include them for free. For example, Xilinx ISE's coregen.

 

[FvM]

square root algorithm for verilog

Without hearing it's for simulation only, I understand a request for synthesizable squareroot code. FPGA vendors may supply an IP core for this purpose, e. g. Altera has. I'm using it for RMS calculation.

P.S.: If you want respectively have been told to implement the algorithm yourself, you'll find a lot of references to integer squareroot algorithm in the internet, including coding schemes, e. g.: https://www.cp.eng.chula.ac.th/~krerk/publication/iscit-sqrt.pdf

Also some example code here https://www.cs.umbc.edu/~squire/f04-411/cs411_down.shtml

 

[ylscqu]

square root calculation algorithm using verilog

search articles about cordic.

 

[Sreya39]

algorithm for square root using verilg

How to use the IP core..

Thanks and regards,
Sreya

 

[echo47]

verilog code for finding the square root

Which IP core are you trying to use, and what is your target device?

 

[Sreya39]

verilog sqrt

i want to implement the division and squareroot module from the IP core... I am coding in verilogHDL and the tool i am using is xilinx and the target device is SPARTAN-3E(XC3S500E)

Thanks and regards,
Sreya

 

[echo47]

square root calculation using verilog

After you launch the CORE Generator (I'm using ISE 10.1), under "Math Functions" you will see two different divider cores and one Square Root core (CORDIC 3.0). You select one of them, and it gives you choices to read the data sheet (very important), and to customize/generate the core files for your ISE project. After it generates the core, it gives you a readme file describing the various output files. One of those files is a template showing you how to instantiate the core into your HDL code.